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There is now a CONTENT FREEZE for Mercury while we switch to a new platform. It began on Friday, March 10 at 6pm and will end on Wednesday, March 15 at noon. No new content can be created during this time, but all material in the system as of the beginning of the freeze will be migrated to the new platform, including users and groups. Functionally the new site is identical to the old one. webteam@gatech.edu
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Title: Design Algorithms and Methodologies for Heterogeneous 2.5D and 3D Integrated Circuits
Committee:
Dr. Lim, Advisor
Dr. Hao, Chair
Dr. Bakir
Abstract: The objective of this proposed research is to provide EDA solutions to address both power and performance in emerging 2.5D and 3D ICs. Due to transistor scaling challenges and power limitations in complex Gigabit Systems on Chip (SoC), chiplet integration is a promising approach to address these issues with the following benefits. First, the chiplet reduces the design's complexity, resulting in a lower cost in manufacturing. Moreover, the advancement in 2.5D/3D packaging technology allows high-density connection between chiplets, reducing bottlenecks and improving the full-chip performance. However, the existing EDA design flow failed to provide high-performance commercial quality 3D ICs. The proposed research aims to resolve the issue, which includes 1) A novel physical design solution to provide commercial quality 3D ICs by mitigating the problems in the placement stage. 2) The EDA design flow to support the heterogeneous integration in 3D ICs. 3) The multi-bit clock clustering technique by applying machine learning to optimize both power and performance in 3D ICs. Next, we plan to study tradeoffs between 2.5D/3D integration types to support very large-scale systems for industry-standard applications.
