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Title: Efficient Hardware Design of Machine Learning Models for Radio Frequency (RF) Signal Modulation Recognition
Committee:
Dr. Mukhopadhyay, Advisor
Dr. Shaolan Li, Chair
Dr. Yu
Abstract: The object of the proposed research is to design an efficient deep neural network (DNN) accelerator by exploiting ternary weight quantization for the application of modulation recognition of the received Radio Frequency (RF) signals. In order to reduce computational demand of the hardware and increase the operation frequency, a low complexity DNN model employing ternary weight quantization is demonstrated with co-analysis of the classification accuracy and the hardware design. To maximize the benefits of the ternary weight quantization, I propose the new hardware design dedicated to the ternary weight type which implements the inference of the DNN model for modulation recognition task. The physical design analysis is based on the Application Specific Integrated Circuit (ASIC) to evaluate the dedicated hardware design, and the results show that the suggested DNN model with the ternary weight quantization and the new hardware design can improve the bandwidth of the received signal by increasing the allowable clock frequency and reduce hardware cost significantly. The work remaining to be done is to integrate this dedicated hardware design mechanism into the DNN model to build the shallow neural network while maintaining the performance and establish the ideal quantization method to maximize the classification accuracy.
