Ph.D. Dissertation Defense - Liran Zheng

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Event Details
  • Date/Time:
    • Thursday August 11, 2022
      2:00 pm - 4:00 pm
  • Location: https://gatech.zoom.us/j/95586204030?pwd=WVZ1S3NTK1JMdWROdExrTFpPRnlwZz09
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Summaries

Summary Sentence: Medium-Voltage Current-Source Solid-State Transformer

Full Summary: No summary paragraph submitted.

TitleMedium-Voltage Current-Source Solid-State Transformer

Committee:

Dr. Deepak Divan, ECE, Chair, Advisor

Dr. Maryam Saeedifard, ECE

Dr. Thomas Habetler, ECE

Dr. Santiago Grijalva, ECE

Dr. Prasad Enjeti, Texas A&M

Dr. Lukas Graber, ECE

Abstract: The objective of this research is to develop circuit topologies, control methods, and medium-voltage (MV) prototypes of the current-source solid-state transformer (SST). Recent years have witnessed significant growth in renewable energy and electrified transportation resources. The MV SST is a promising solution to replace the conventional line-frequency transformer and integrate these resources into DC or AC power grids with reduced footprint and power loss. The MV SST prototypes in the literature are based on voltage-source topologies. The voltage-source SST topologies have the drawbacks of complex multi-stage conversion, high dv/dt, high volume, and low efficiency. In this dissertation, single-stage current-source SST topologies are proposed for higher efficiency and density, including universal circuits and reduced-switch circuits. Based on 3.3 kV SiC reverse-blocking modules, a 5 kV DC and a 7.2 kV AC multiport current-source SST prototype are developed to verify the proposed circuit topologies. A grounding method is also developed to mitigate the additional device voltage stress from ground leakage current. Significantly, it is the first time that MV current-source SST experimental prototypes and results have been reported. Conventional voltage-source SST has bulky DC-link, which enables the use of proportional-integral controller. However, the modular current-source SST has fast dynamics from reduced DC-link. Such modular reduced DC-link converter is proposed as stacked low-inertia converter (SLIC). A model predictive priority-shifting (MPPS) control method is proposed for the SLIC. The performance is analyzed and verified under parameter mismatches, low-inertia DC-link, and time delay. A clamping modulation is also proposed to address the voltage sharing of reverse-blocking devices. Besides these control methods for basic operation, control methods are proposed for advanced metrics. First, a direct DC-link predictive control method for active power decoupling and higher density is proposed. Second, a partial-power control method is proposed for higher efficiency of the multiport configuration. Third, a dynamic DC-link minimization control method is proposed for higher efficiency. These control concepts are verified on the 5 kV and the 7.2 kV SST prototypes.

Additional Information

In Campus Calendar
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ECE Ph.D. Dissertation Defenses

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Public
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Other/Miscellaneous
Keywords
Phd Defense, graduate students
Status
  • Created By: Daniela Staiculescu
  • Workflow Status: Published
  • Created On: Aug 1, 2022 - 3:28pm
  • Last Updated: Aug 1, 2022 - 3:29pm