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There is now a CONTENT FREEZE for Mercury while we switch to a new platform. It began on Friday, March 10 at 6pm and will end on Wednesday, March 15 at noon. No new content can be created during this time, but all material in the system as of the beginning of the freeze will be migrated to the new platform, including users and groups. Functionally the new site is identical to the old one. webteam@gatech.edu
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Title: Electronic Design Automation Tools and Design Study for Heterogeneous Monolithic 3D Integrated Circuits
Committee:
Dr. Sung-Kyu Lim, ECE, Chair, Advisor
Dr. Saibal Mukhopadhyay, ECE
Dr. Shimeng Yu, ECE
Dr. Callie Hao, ECE
Dr. Hyesoon Kim, CoC
Abstract: Technology scaling predicted by Moore’s law is gradually slowing down and new alternatives to silicon-based transistors are being explored. Some of the most promising solutions make use of materials such as carbon nanotubes or ferroelectric layers in the gate stack. While such materials bring improvements to the transistor performance, Three Dimensional (3D) Integrated Circuit (IC) Design, which is the focus of this work, is another promising alternative for going beyond Moore's Law. 3D IC provides power, performance, and area (PPA) benefits at full-chip level, orthogonal to the transistor improvements by stacking multiple smaller 2D dies vertically instead of using a single large 2D die. The objective of this research is to explore and exploit novel design configurations possible with 3D ICs. Furthermore, tool flows and algorithms were developed to augment and capitalize on the commercially available 2D Electronic Design Automation (EDA) tools to support our exploration. While most of the work is done based on assumptions related to the state-of-the-art research fabrication methods for 3D such as Monolithic 3D ICs, we also develop new flows to refine the 3D IC routing with commercially available fabrication techniques such as hybrid bonding and micro-bump based 3D ICs.
