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Title: Design Optimization of Power Delivery Networks in Packaging
Committee:
Dr. Swaminathan, Advisor
Dr. Raychowdhury, Chair
Dr. Lim
Abstract: The objective of the proposed research is to investigate the methods for design optimization of power delivery networks in packaging. In current high-performance computing systems, the demand for high operating frequencies and density of transistors in integrated circuits (IC) has caused faster transients and higher currents, resulting in large power supply noise and voltage droop. As the supply voltage operating margin for ICs gradually decreases due to the continued transistor scaling, managing power supply noise below a threshold level has become a challenge. Therefore, in this work, we first present a methodology to predict the voltage droop caused by current sources in ICs. We derive the analytical relations and analyze the error in the predicted voltage droop values. We also consider the effect of current step rise time on the voltage droop along with error analysis and capture the error bounds for the analytical equations derived. Then, we introduce two novel approaches to optimize the response of power delivery network (PDN) using the minimum number of capacitors. In the first approach, we propose a non-random exploration-based method to determine decap design in power delivery networks (PDNs). Unlike previous optimization methods, which are based on either full search or random exploration (machine learning etc.), the present method requires few simulations to converge to the minimum decoupling capacitor solution. The second method is an advantage actor-critic (A2C) reinforcement learning (RL)–based method for the optimization of decap design. Compared to the previous RL-based methods, the proposed method can provide a larger number of optimized decap design solutions compared with previous methods and can yield decap solutions even for multi-port optimization.
