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There is now a CONTENT FREEZE for Mercury while we switch to a new platform. It began on Friday, March 10 at 6pm and will end on Wednesday, March 15 at noon. No new content can be created during this time, but all material in the system as of the beginning of the freeze will be migrated to the new platform, including users and groups. Functionally the new site is identical to the old one. webteam@gatech.edu
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PRC – The Next Era
Madhavan Swaminathan
John Pippin Chair in Microsystems Packaging & Electromagnetics
Director, Center for Co-Design of Chip, Package, System (C3PS)
School of Electrical and Computer Engineering, Georgia Tech (GT), USA
Abstract:
A combination of "Moore" (IC) and "More than Moore" (package) scaling has led to the shrinking of electronic systems over the last several decades, and this trend is expected to continue into the future. PRC has pioneered package scaling over the last 24 years. As the first NSF Engineering Research Center (ERC) at Georgia Tech, it also created history and set the stage for future such centers at Georgia Tech. Being a legacy center, the question remains as to what should be the future trajectory for PRC and how should PRC organize itself as we address interesting and challenging problems of the future.
This vision talk will cover the past, present and future in the field of packaging and package scaling based on interactions with industry, govt. labs, sponsoring agencies and academia over a period of two decades. This talk will also cover the presenter’s vision for building a mega center in packaging that covers electronic systems in its entirety, thus enabling Georgia Tech to be at the forefront of packaging in the future.
Speaker Bio:
Madhavan Swaminathan is the John Pippin Chair in Microsystems Packaging & Electromagnetics in the School of Electrical and Computer Engineering (ECE) and Director of the Center for Co-Design of Chip, Package, System (C3PS), GT. He formerly held the position of Joseph M. Pettit Professor in Electronics in ECE and Deputy Director of the NSF Microsystems Packaging Research Center, GT. Prior to joining GT, he was with IBM working on packaging for supercomputers. He is the author of 450+ refereed technical publications, holds 30 patents, primary author and co-editor of 3 books, founder and co-founder of two start-up companies, and founder of the IEEE Conference Electrical Design of Advanced Packaging and Systems (EDAPS), a premier conference sponsored by the EPS society. His research work has been recognized through several awards including 21 best paper and best student paper awards, 2018 Scott D. Wills Distinguished Mentor Award, GT ’17, Outstanding Achievement in Research Program Development Award, GT ’14, Distinguished Alumnus Award from NITT (India), 2014 Outstanding Sustained Technical Contribution Award from IEEE EPS Society, 2007 Technical Excellence Award from Semiconductor Research Corporation, 2003 Outstanding Faculty Leadership Award for the advisement of GRAs, GT ’02, Outstanding Faculty Advisor Award from ECE, GT and IBM Outstanding Faculty Award in 2004 and 2005. He is an IEEE Fellow and has served as the Distinguished Lecturer for the IEEE EMC society. Forty two PhD and twenty MS students have graduated under his supervision. He received his BE degree in Electronics and Communication from NIT, Trichy in 1985 and MS/PhD degrees in Electrical Engineering from Syracuse University in 1989 and 1991, respectively.
