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Title: Experimental Benchmarking of CVD Graphene for Memory and Interconnect Applications
Committee:
Dr. Naeemi, Advisor
Dr. Bakir, Chair
Dr. Vogel
Abstract:
The objective of this research is two fold: (1) fabricate and characterize graphene-based floating gate (FG) flash memory and benchmark its performance against conventional floating gate memory devices, and (2) to develop experimentally-validated circuit models for multilayer graphene (MLG) interconnects and use these models to benchmark MLG interconnects against conventional metallic interconnects. Specifically, we propose an accurate method to determine the field-enhancement factor of graphene when used as an FG in flash memory and use the exctracted value to assess the performance of 64-bit NAND strings. We also propose a fabrication method to improve the mobility of single layer graphene grown by chemical vapor deposition and assess its performance with conventional copper interconnects using several electrical performance figures of merit such as power consumption, delay, and energy-delay product.. We extend our analysis to include multilayer graphene interconnects where we propose an accurate method to determine the interlayer resistivity of AB-stacked as well astwisted multilayer graphene and benchmark their performance in DC as well as high frequency regimes.
