Nasir Tapped for IEEE HOST Best Student Paper Award

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Jackie Nemeth

School of Electrical and Computer Engineering

404-894-2906

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Summaries

Summary Sentence:

ECE Ph.D. student Saad Bin Nasir won the Best Student Paper Award at the 2017 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), held May 1-5 in McLean, Virginia.

Full Summary:

ECE Ph.D. student Saad Bin Nasir won the Best Student Paper Award at the 2017 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), held May 1-5 in McLean, Virginia.

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  • Saad Bin Nasir Saad Bin Nasir
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Saad Bin Nasir, a Ph.D. student in the Georgia Tech School of Electrical and Computer Engineering (ECE), won the Best Student Paper Award at the 2017 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), held May 1-5 in McLean, Virginia. He is advised by ECE Associate Professor Arijit Raychowdhury and is a member of the Integrated Circuits and Systems Research Lab.

Nasir’s paper is entitled "High Efficiency Power Side-Channel Attack Immunity using Noise Injection in Attenuated Signature Domain” and is a collaboration with Raychowdhury; Debayan Das, Shovan Maity, and Shreyas Sen at the SPARC Lab at Purdue University; and the Emerging Security Lab at Intel.

Side-Channel Attacks (SCA) focus on measuring physical side-channel information leaked from computationally secure cryptographic engines to attack and expose a secret key. Power Side-Channel uses the power/current consumption of the cryptographic IC. This work proposes embedding the cryptographic engine in signature-attenuating dual-loop hardware (a novel shunt low-dropout regulator, LDO-based on Switched Mode Control), along with tiny noise injection to demonstrate highly efficient protection against Power SCA. Modeling, test-chip development, and testing were carried out in 130nm CMOS technology.

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School of Electrical and Computer Engineering

Categories
Student and Faculty, Student Research, Research, Computer Science/Information Technology and Security, Engineering, Nanotechnology and Nanoscience
Related Core Research Areas
Cybersecurity, Electronics and Nanotechnology
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Keywords
Arijit Raychowdhury, side-channel, cryptography, side-channel attacks, Integrated Circuits and Systems Research Lab, Georgia Tech, IEEE International Symposium on Hardware Oriented Security and Trust, School of Electrical and Computer Engineering
Status
  • Created By: Jackie Nemeth
  • Workflow Status: Published
  • Created On: May 10, 2017 - 10:10am
  • Last Updated: May 10, 2017 - 10:10am