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Title: Silicon Microsystem Platform with Integrated Microfluidic Cooling and Low-loss Through-silicon Vias
Committee:
Dr. Muhannad Bakir, ECE, Chair , Advisor
Dr. Gary May, ECE, Co-Advisor
Dr. Oliver Brand, ECE
Dr. Hua Wang, ECE
Dr. Madhavan Swaminathan, ECE
Dr. Suresh Sitaraman, ECE
Abstract:
Microfluidic cooling technology is a promising thermal solution for high-performance three-dimensional (3-D) microsystems. However, the integration of microfluidic cooling into 3-D microsystems inevitably impacts tier-to-tier through-silicon vias (TSVs) by increasing their length and diameter (for a fixed aspect ratio). To address this challenge, we present the fabrication of high-aspect ratio (23:1) TSVs within a microfluidic pin-fin heat sink using two types of silicon etch masks. Moreover, the impact of liquid cooling on the electrical characteristics of TSVs is analyzed using a microfluidic cooling testbed containing TSVs. The high-frequency characterization of TSVs embedded in microfluidic pin-fins with the presence of deionized water is performed from 10 MHz to 20 GHz. Lastly, to electrically shield the signal transmission of such TSVs, coaxially-shielded TSVs consisting of a single signal TSV surrounded by multiple ground TSVs are demonstrated.
