Ph.D. Dissertation Defense - Prashant Nair

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Event Details
  • Date/Time:
    • Wednesday March 15, 2017 - Thursday March 16, 2017
      11:00 am - 12:59 pm
  • Location: Room 2100, Klaus
  • Phone:
  • URL:
  • Email:
  • Fee(s):
    N/A
  • Extras:
Contact
No contact information submitted.
Summaries

Summary Sentence: Architectural Techniques to Enable Reliable and Scalable Memory Systems

Full Summary: No summary paragraph submitted.

TitleArchitectural Techniques to Enable Reliable and Scalable Memory Systems

Committee:

Dr. Moinuddin Qureshi, ECE, Chair , Advisor

Dr. Sudhakar Yalamanchili

Dr. Saibal Mukhopadhyay, ECE

Dr. Milos Prvulovic, ECE

Dr. Onur Mutlu, ETH Zurich

Abstract:

High capacity and scalable memory systems play a vital role in enabling our desktops, smartphones, and pervasive technologies like Internet of Things (IoT). Unfortunately, memory systems are becoming increasingly prone to faults. This is because we rely on technology scaling to improve memory density, and at small feature sizes, memory cells tend to break easily. Today, memory reliability is seen as the key impediment towards using high-density devices, adopting new technologies, and even building the next Exascale supercomputer. To ensure even a bare-minimum level of reliability, present-day solutions tend to have high performance, power and area overheads. Ideally, we would like memory systems to remain robust, scalable, and implementable while keeping the overheads to a minimum. This dissertation describes how simple cross-layer architectural techniques can provide orders of magnitude higher reliability and enable seamless scalability for memory systems while incurring negligible overheads.

Additional Information

In Campus Calendar
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Groups

ECE Ph.D. Dissertation Defenses

Invited Audience
Public
Categories
Other/Miscellaneous
Keywords
Phd Defense, graduate students
Status
  • Created By: Daniela Staiculescu
  • Workflow Status: Published
  • Created On: Mar 2, 2017 - 2:34pm
  • Last Updated: Mar 2, 2017 - 2:48pm