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Title: Fine-grained On-chip Power Management using All-digital and Digitally-assisted Linear Voltage Regulators
Committee:
Dr. Raychowdhury, Advisor
Dr. Swaminathan, Chair
Dr. Wang
Abstract:
The objective of the proposed research is to build all-digital and digitally-assisted linear voltage regulators to enable fine-grained on-chip power management in multi-core processors and system-on-a-chip designs. Both spatial and fast temporal adaptation of supply voltage are needed to achieve unprecedented levels of performance and reduced energy consumption. The proposed research will demonstrate that digital and digitally-assisted linear voltage regulators serve as key design enablers for such fine-grained power management. They provide an opportunity for automated synthesis, process and voltage scalability, wide operational dynamic range, low power overhead, and fast response times as compared to the state-of-the-art designs. As a part of the proposed research, theoretical modeling, design guidelines and experimental verification of all-digital and digitally-assisted linear voltage regulators will be performed through test-chips built in scaled CMOS processes.
