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Speaker: Assistant Professor Ki Jin Han
Title: Modeling, Characterization and Design of Packaging and Interconnections for Advanced Electronic Systems
Abstract:
With the increase of data bandwidth and the need for multi-functional systems based on higher-level integration, the role of electronic interconnects and packaging (EIP) is becoming more important. The EIP enables the propagation of analog and digital signals in a chip or between sub-systems, but they limit the performance of the entire system especially in high-speed applications due to non-ideal properties such as losses, crosstalk, and impedance mismatching. Therefore, systematic approaches to design EIP, supported by electrical modeling and characterization, are essential for the success in the today’s electronic design.
In this talk, the background of the recent EIP research trends will be briefly introduced, and our contributions on the modeling, characterization, and design of EIP will be presented. Firstly, the development of electrical modeling (or path-finding) tool for packages and interposers in silicon-based 3D integration will be discussed. Secondly, indirect contact probing method for the stable and fast characterization of vertical interconnects will be introduced. Finally, design methodologies based on the efficient EIP modeling methods will be presented with high-speed I/O interface design examples.
Biography:
Ki Jin Han received the B.S. and M.S. degrees in electrical engineering from Seoul National University in 1998 and 2000, respectively, and the Ph.D. degree from the Georgia Tech in 2009. From 2009 to 2011, he was with the IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA, as a Postdoctoral Researcher. He is currently with the School of ECE, UNIST, Korea, as an Associate Professor. His current research interests include computational electromagnetics, EMC for power electronics, signal/power integrity for high-speed digital design, antennas, and electrical modeling of electronic packaging and interconnections. Dr. Han served as the TPC Chair of the 2015 IEEE EDAPS Symposium. He received the 2015 IEEE Transactions on Components, Packaging and Manufacturing Technology Best Paper Award in June 2016.
