Georgia Tech Professor Rao Tummala to Present Keynote at the 2016 International Wafer-Level Packaging Conference

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Summaries

Summary Sentence:

The Georgia Institute of Technology, School of Electrical and Computer Engineering Professor, Dr. Rao Tummala, will present a keynote lecture at the 2016 International Wafer-Level Packaging Conference (IWLPC), on October 19 in San Jose, CA.

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  • Rao Tummala Rao Tummala
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The SMTA and Chip Scale Review magazine have announced that The Georgia Institute of Technology, School of Electrical and Computer Engineering Professor, Dr. Rao Tummala, will present a keynote lecture at the 2016 International Wafer-Level Packaging Conference (IWLPC), on October 19 in San Jose, CA.

Titled "Promise and Future of Embedding and Fan-Out Technologies,” Prof. Tummala’s speech will touch upon the two types packaging strategies, wafer-level packaging (WLP) with embedded ICs with limited external I/O connections, and fan-out technology (eWLP) that eliminates these I/O limitations. He will also talk about two other alternatives such as panel level fan out with chip-first and chip-last options. This presentation will describe the promise and future of embedding and fan-out technologies in relation to package size, thickness, interconnect length, I'O pitch and production costs.

Prof. Rao Tummala is a Distinguished and Endowed Professor Chair at Georgia Tech. He is well known as an industrial technologist, technology pioneer, and educator. He is the father of LTCC and many System-on-Package Technologies.

Interconnecting Wafer-Level packaging, 3D, and manufacturing, the International Wafer-Level Packaging Conference (IWLPC) has been at the forefront of packaging technology evolution. IWLPC brings together some of the semiconductor industry's most respected authorities addressing all aspects of wafer-level, 3D, TSV, and MEMS device packaging and manufacturing.  More about the conference here

- Christa Ernst

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NanoTECH

Categories
Institute and Campus, Special Events and Guest Speakers, Engineering, Nanotechnology and Nanoscience
Related Core Research Areas
Electronics and Nanotechnology
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Keywords
3D Integrated Systems, 3D Packaging, Advanced Semiconductor Manufacturing, device packaging, embedded ICs, mems, Rao Tummala, School of Electrical and Computer Engineering, the Georgia Electronic Design Center, the Institute for Electronics and Nanotechnology, The School of Materials Science and Engineering, Wafer-Level Packaging Conference
Status
  • Created By: Christa Ernst
  • Workflow Status: Published
  • Created On: Jun 30, 2016 - 5:02am
  • Last Updated: Oct 7, 2016 - 11:22pm