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Atlanta, GA | Posted: October 6, 2015
Jackie Nemeth
School of Electrical and Computer Engineering
404-894-2906
Summary Sentence:
ECE Ph.D. student Monodeep Kar received a Best in Session Award at SRC TECHCON 2015, held September 20-22 in Austin, Texas.
Full Summary:
ECE Ph.D. student Monodeep Kar received a Best in Session Award at SRC TECHCON 2015, held September 20-22 in Austin, Texas.
Monodeep KarMonodeep Kar received a Best in Session Award at SRC TECHCON 2015, held September 20-22 in Austin, Texas. He is a Ph.D. student in the Georgia Tech School of Electrical and Computer Engineering (ECE).
TECHCON is organized annually by Semiconductor Research Corporation (SRC) to showcase a selected set of SRC-sponsored research.
This is the second year in a row that Kar has received an SRC Best in Session Award. This year, he received the honor in the Power Management for Circuit Design session for his paper, "A Scalable Hybrid Regulator for Down Conversion of High Input Voltage Using Low Voltage Devices,” co-authored with his Ph.D. advisor and ECE Professor Saibal Mukhopadhyay and fellow ECE Ph.D. student Khondker Zakir Ahmed.
Their work focuses on delivering high quality power with regulated voltage to digital processors, which is a critically sought goal for today’s high performance mobile systems. A critical challenge in achieving that goal is to bring higher voltage (higher than the voltage rating of the devices) closer to the silicon processor. Delivering high voltage directly to the processor chip reduces the conduction losses through the package and PCB traces. If down-conversion of high voltages can be realized using conventional CMOS devices, it will open pathways for seamless integration of regulators with digital microprocessors and will help reduce system volume.
This work presents a unique voltage regulator, referred to as a hybrid regulator, to address this challenge. The hybrid regulator consists of a switched capacitor voltage regulator, followed by an inductive buck regulator. This high conversion ratio hybrid regulator architecture is demonstrated in 130nm standard CMOS technology. Major challenges addressed are sustenance of high voltage stress while using only low voltage digital transistors, safe startup, improvement of low-load efficiency, and load-dependent variable frequency operation.
