*********************************
There is now a CONTENT FREEZE for Mercury while we switch to a new platform. It began on Friday, March 10 at 6pm and will end on Wednesday, March 15 at noon. No new content can be created during this time, but all material in the system as of the beginning of the freeze will be migrated to the new platform, including users and groups. Functionally the new site is identical to the old one. webteam@gatech.edu
*********************************
Azad Naeemi: azad@gatech.edu
Summary Sentence: Moving towards advanced technology nodes of 10, 7, 5nm and beyond, significant material changes are required in order to overcome the interconnect challenges. Innovations are required in the conductor and dielectric materials as well as layout.
Full Summary: No summary paragraph submitted.
Zsolt Tokei
IMEC ChipIntroduction to IMEC Activities and Innovations in Interconnect Scaling
Zsolt Tőkei, IMEC, Program Director: Nano Interconnects
Marcus Nanotechnology Building, Conference Room 1116-1118
Abstract: Moving towards advanced technology nodes of 10, 7, 5nm and beyond, significant material changes are required in order to overcome the interconnect challenges. Innovations are required in the conductor and dielectric materials as well as layout. On one hand, for the past few technology generations, the same type of materials have been reused and served as the workhorse for realizing ever more complex chips in an arena of multiple patterning and shrinking dimensions. On the other hand interconnect parasitics increasingly affect device performance and hence limit the overall technology progress. Time has come for changing our approach. In this talk it will be illustrated which type of materials, methods and approaches are emerging in order to tackle the challenges lying ahead. While aggressive dimensional shrinking remains relevant, emerging materials and processes options, such as for example Mn-based barriers, self-assembled monolayers, electroless deposition and carbon based approaches show promise. The implementation of these options has to ensure that interconnect figures of merits for speed, power, noise, bandwidth density and reliability are improved with respect to currently available technologies.
Bio: Zsolt Tőkei joined IMEC in 1999 as process engineer in the field of copper low-k interconnects then headed the metal section. Later he became principal scientist and in December 2008 was appointed as Program Director Nano Interconnects. He obtained M.S. in physics (1994), PhD in physics and materials science (1997). From 1998 he worked at the Max-Planck Institute. From the date of joining IMEC he continued working on a range of interconnect issues including metallization, electrical characterization, interconnect scaling and dielectric reliability. He has authored or co-authored over 200 publications in international scientific journals and in international scientific proceedings. He has been or is currently serving as a committee member for several international conferences (IEDM CRY, IRPS, IPFA, ESREF, AMC, IITC).
