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Atlanta, GA | Posted: September 29, 2014
Jackie Nemeth
School of Electrical and Computer Engineering
404-894-2906
Summary Sentence:
ECE Ph.D. student Taiyun Chi was presented with the Intel/Texas Instruments/Catalyst Foundation Student Scholarship Award at the 2014 IEEE Custom Integrated Circuits Conference (CICC), held September 15-17 in San Francisco.
Full Summary:
ECE Ph.D. student Taiyun Chi was presented with the Intel/Texas Instruments/Catalyst Foundation Student Scholarship Award at the 2014 IEEE Custom Integrated Circuits Conference (CICC), held September 15-17 in San Francisco.
Taiyun ChiTaiyun Chi was presented with the Intel/Texas Instruments/Catalyst Foundation Student Scholarship Award at the 2014 IEEE Custom Integrated Circuits Conference (CICC), held September 15-17 in San Francisco.
Chi was honored for his CICC paper, "A Multi-Phase Sub-Harmonic Injection Locking Technique for Bandwidth Extension in Silicon-Based THz Signal Generation," co-authored by Jun Luo, a Ph.D. student visiting Georgia Tech from Tsinghua University (Beijing, China); Song Hu, a Ph.D. student at the Georgia Tech GEMS lab; and his Ph.D. advisor, ECE Assistant Professor Hua Wang.
Chi's paper presented research performed in the Georgia Tech Electronics and Micro-System (GEMS) Lab in the area of sub-mmwave and terahertz integrated electronics research. A major existing challenge in this area is to realize a high-performance, low-cost silicon-based integrated THz source with high spectrum purity and a wide frequency tuning range. The paper addresses this unmet need by proposing and demonstrating a novel, multi-phase sub-harmonic injection locking circuit topology, which can "actively" multiply a 40 GHz signal to generate a 500 GHz signal while maintaining high DC-to-THz energy conversion efficiency and spectrum purity.
Compared with existing circuit approaches, this multi-phase sub-harmonic injection locking scheme extends the frequency tuning bandwidth by 150 percent to 200 percent under the same RF injection power. Chi's IC chip demonstrates state-of-the-art performance with a frequency tuning range of 4.4 percent and a phase noise of -77.6dBc/Hz at 1 MHz offset among the reported fully integrated silicon-based source at 500 GHz.
Photo cutline: Don Thelen (left), of ON Semiconductor and the 2014 IEEE-CICC technical program chair, presents ECE Ph.D. student Taiyun Chi with the Intel/Texas Instruments/Catalyst Foundation Student Scholarship Award.
